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ADT7462
Table 17. VOLTAGE VALUE AND LIMIT REGISTERS
Low Limit
High Limit
Voltage Value
+12V1
+12V2
+3.3V
+1.8V or +2.5V
+1.25V or +0.9V
+5V
+12V3
V CCP1 , +1.5V, +1.8V, +2.5V
V CCP2 , +1.5V, +1.8V, +2.5V
+1.2V1 (G BIT ) or +3.3V
+1.2V2 (FSB_V TT ) or V BATT
+1.5V1 (ICH)
+1.5V2 (3GIO)
Pin No.
7
8
13
15
19
21
22
23
24
25
26
28
29
Value Register Address
0xA3
0xA5
0x96
0x8B
0x8F
0xA7
0xA9
0x90
0x91
0x92
0x93
0x94
0x95
Register
0x6D
0x6E
0x70
0x45
0x47
0x71
0x6F
0x72
0x73
0x74
0x75
0x76
0x77
Default
0x00
0x00
0x00
0x40
0x40
0x00
0x00
0x20
0x00
0x00
0x80
0x00
0x00
Register
0x7C
0x7D
0x68
0x49
0x4B
0x7E
0x7F
0x69
0x6A
0x6B
0x6C
0x50
0x4C
Default
0xFF
0xFF
0xFF
0x95
0x95
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xA4
0xA4
3 k W
49.5 k W
Battery Measurement Input (V BATT )
The V BATT input allows the condition of a CMOS backup
battery to be monitored. This is typically a lithium coin cell,
such as a CR2032. The V BATT input is accurate only for
voltages greater than 1.2 V. Note that when Pin 26 is
configured as a +1.2V input, voltages lower than 1.2 V are
not accurately measured. Input voltage and corresponding
voltage measured are shown in Figure 16.
Typically, the battery in a system is required to keep some
devices powered on when the system is in a powered-off
state. The V BATT measurement input is designed to minimize
battery drain. To reduce current drain from the battery, the
lower resistor of the V BATT attenuator is not connected,
except when a V BATT measurement is being made. The total
current drain on the V BATT pin is 80 nA typical (for a
maximum V BATT voltage = 4.0 V), so a CR2032 CMOS
battery functions in a system in excess of the expected
10 years. Note that when a V BATT measurement is not being
made, the current drain is reduced to 16 nA typical. Under
normal voltage measurement operating conditions, all
measurements are made in a round-robin format, and each
Monitoring cycle time depends on the ADT7462
configuration. Calculating the monitoring cycle time is
described in more detail in the ADC Information section.
V BATT Input Battery Protection
In addition to minimizing battery current drain, the V BATT
measurement circuitry is specifically designed with battery
protection in mind. Internal circuitry prevents the battery
from being back-biased by the ADT7462 supply or through
any other path under normal operating conditions. In the
unlikely event of a catastrophic ADT7462 failure, the
ADT7462 includes a second level of battery protection,
including a series 3 k W resistor to limit current to the battery,
as recommended by UL (see Figure 37). Thus, it is not
necessary to add a series resistor between the battery and the
V BATT input; the battery can be connected directly to the
V BATT input to improve voltage measurement accuracy.
V BATT
DIGITAL
CONTROL
reading is actually the result of 16 digitally averaged
measurements. However, averaging is not carried out on the
V BATT measurement to reduce measurement time and,
therefore, reduce the current drain from the battery.
4.5 pF
82.7 k W
3 k W
ADC
The V BATT current drain when a measurement is being
made is calculated by:
where:
I +
V BATT
100 k W
t pulse
t period
Figure 37. Equivalent V BATT Input Protection Circuit
t PULSE is the V BATT measurement time (~711 m s typical).
t PERIOD is the time required to measure all analog inputs.
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